In thin film transistor liquid crystal display (TFT-LCD) fabrication, there are usually some point defects, open circuit, and short circuit defects in a panel caused by the manufacturing process or by environmental conditions, such as electro-static discharge (ESD) or particle contamination, which degrade display quality and thus significantly reduce product yield.
Therefore, repair lines or repair patterns are sometimes designed into panel layouts to facilitate defect repair. In most cases, these repair lines and patterns are located completely outside of the display region or in peripheral circuit regions near panel edges to accommodate defect repair in the display region by employing a laser.
Because the location of repair lines and patterns are distant from defects, a repair process first involves identifying a defect position, and then moving the LCD panel to find repair positions outside the display region. Thus, time spent for repair is significant and unfavorable for production. In addition, the actual repair efficiency is limited by a finite area available for locating repair lines outside the display region.
Besides, repair lines located in peripheral circuit regions are also in redundant, have lengths much greater than data lines and scan lines, and overlap many data and scan lines, the RC loading of each metal line is thus readily increased, and a signal distortion problem is also induced.
Furthermore, for pixels with a storage-capacitor-on-common (Cst-on-common) design, there is only one common line in any pixel region, so a Cst-open condition is induced easily if a common-line-open condition occurs during manufacture.